Three security vulnerabilities have been disclosed in the Peripheral Component Interconnect Express (PCIe) Integrity and Data Encryption (IDE) protocol specification that could expose local attackers to significant risk.
According to the PCI Special Interest Group (PCI-SIG), this flaw affects PCIe Base Spec Revision 5.0 and later, a protocol mechanism introduced by an IDE Engineering Change Notice (ECN).
“Depending on the implementation, this could result in one or more of the following security breaches for the affected PCIe components: (i) information disclosure, (ii) privilege escalation, or (iii) denial of service,” the consortium notes.
PCIe is a widely used high-speed standard for connecting hardware peripherals and components such as graphics cards, sound cards, Wi-Fi and Ethernet adapters, and storage devices inside computers and servers. PCIe IDE, introduced in PCIe 6.0, is designed to secure data transfers through encryption and integrity protection.
The three IDE vulnerabilities discovered by Intel employees Arie Aharon, Makaram Raghunandan, Scott Constable, and Shalini Sharma are listed below.
CVE-2025-9612 (Forbidden IDE Reordering) – Missing integrity check on the receive port allows reordering of PCIe traffic, potentially causing the receiver to process stale data. CVE-2025-9613 (Completion Timeout Redirect) – Incomplete flushing of the completion timeout could allow a receiver to accept malformed data when an attacker injects a packet with a matching tag. CVE-2025-9614 (Lazy Post Redirect) – Incomplete flushing or rekeying of an IDE stream could allow the receiver to consume stale and malformed data packets.
PCI-SIG stated that successful exploitation of the aforementioned vulnerabilities could compromise the confidentiality, integrity, and security objectives of the IDE. However, this attack relies on gaining physical or low-level access to the targeted computer’s PCIe IDE interface, making it a low-severity bug (CVSS v3.1 score: 3.0/CVSS v4 score: 1.8).
“All three vulnerabilities could expose IDEs and systems that implement Trusted Domain Interface Security Protocol (TDISP) to attackers, potentially compromising the isolation between trusted execution environments.”
In an advisory released Tuesday, the CERT Coordination Center (CERT/CC) urged manufacturers to follow the updated PCIe 6.0 standard and apply Erratum #1 guidance to their IDE implementations. Intel and AMD have issued their own alerts stating that the issue affects the following products:
Intel Xeon 6 processor with P core Intel Xeon 6700P-B/6500P-B series SoC with P core. AMD EPYC 9005 Series Processor AMD EPYC Embedded 9005 Series Processor
“End users should apply firmware updates provided by their system or component suppliers, especially in environments that rely on IDEs to protect sensitive data,” CERT/CC said.
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