The EUPEX Pilot aims to demonstrate Europe’s readiness to build a fully sovereign ARM-based supercomputer from chip to software.
High performance computing (HPC) has quietly become one of the key pillars of modern society. From climate modeling and weather forecasting to drug discovery, artificial intelligence, industrial design, and energy optimization, supercomputers currently power some of the most important scientific, economic, and social advances. As data volumes continue to grow exponentially and computational demands continue to grow, access to a powerful, efficient, and scalable HPC infrastructure is no longer a luxury. It’s a strategic necessity.
HPC not only leverages many applications, but has also become a strategic asset. The ability to build and operate powerful supercomputers will increasingly impact Europe’s technological independence and position on the world stage. With major investments from the US and Asia, Europe faces the challenge of developing its own technology while maintaining the highest level of competitiveness.
EUPEX, a European project funded by EuroHPC Joint Undertaining, is tackling this challenge head-on. The goal is to create a pilot supercomputing platform based entirely on European technology, from the hardware to the software stack. The platform uses new ARM-based processors designed for the performance, energy efficiency and scalability required for next-generation HPC systems, and provides a concrete step towards European computing independence.
The pilot will provide a realistic environment to test responsiveness, scalability, and operational reliability in combination with European-developed software solutions. In doing so, EUPEX Pilot aims not only to prove that Europe is capable of delivering competitive high-performance supercomputing infrastructure, but also to develop and demonstrate European expertise in microelectronics, system architecture, and HPC software. The project will also explicitly prepare applications and European users to efficiently exploit future exascale machines, providing an opportunity for co-design and initial testing of workflows and software on the new platform.
The EUPEX Pilot brings together Europe’s leading research centres, technology providers and industry partners to set the stage for the next era of European supercomputers, demonstrating that a fully European stack can operate at scale, and paving the way for even larger sovereign HPC systems.
EUPEX consortium
At the heart of this ambition is a diverse and strategically balanced consortium of 17 European organizations, each contributing their unique expertise to the challenge of building a complete European HPC ecosystem. The consortium includes established technology suppliers, research institutions, national supercomputing centers, industrial innovators, and application stakeholders. These partners will be coordinated by Eviden to ensure that research and development efforts are translated into industrialized solutions based on European technology. Key members include Forschungszentrum Jülich, CEA, GENCI, Cineca, E4 Computer Engineering, ParTec, EXAPSYS, SECO, CybeleTech, ECMWF, Politecnico di Milano/CINI, University of Mainz, IT4Innovations, University of Zagreb, and other leading academic institutions. Together they form a European ecosystem of expertise that supports EUPEX Pilot’s technical and strategic objectives.
EUPEX Pilot System
The EUPEX pilot system is designed to introduce a complete European HPC platform that meets the needs of current and future scientific applications, building on the expertise of a pan-European consortium. This project has two main objectives. First, we designed the hardware architecture of the Pilot platform with the aim of enabling the integration of different technologies in a flexible and scalable environment. Second, we will deploy and operate the ARM-based Pilot production-class platforms in parallel with our initial test systems and make these platforms accessible to the European scientific community to foster innovation and co-design of applications.
To achieve these goals, the EUPEX Pilot platform is designed to evolve over time and integrate European hardware technologies as they become available. This will allow us to combine an early test platform with a production-class environment to gradually prepare for the arrival of Europe’s next-generation processors.
Within this framework, the main component of the pilot system is the General Purpose Processing (GPP) module. The processor was designed within the European Processor Initiative (EPI project) and integrated into the motherboard and is based on the Rhea chip developed by SiPearl and integrated into the GPP blade. This blade was developed within the EUPEX project and leverages BXI (Bull eXascale Interconnect) to provide low-latency, high-throughput communication between nodes. These GPP blades are integrated into the BullSequana XH3000 rack with liquid cooling developed by Eviden. The BullSequana XH3000 design enables modular expansion and maintains power usage efficiency (PUE) close to 1, increasing energy efficiency while adapting to different system configurations. This integration represents the core objective of the EUPEX project: validating the deployment of European-designed ARM processors into production-class HPC systems.
Since GPP processors are still under development, the EUPEX Pilot platform is being prepared as a testbed for future integration. The current Pilot is built using ARM processors to validate the system architecture and software environment that supports targeted Rhea chips in production-class settings. This preparation will enable EUPEX to validate hardware integration, test software compatibility, and gather actionable insights to guide future large-scale deployments.
On the software side, the system uses Partec’s ParaStation Modulo, a software suite for operating large-scale distributed memory HPC systems, and OCEAN, developed by CEA, which provides an open-source cluster management stack proven in large-scale HPC systems. Additional open source tools and libraries developed by EUPEX partners support application performance, energy efficiency, and operational optimization.
The EUPEX pilot system is designed as a proof of concept at a meaningful scale. Its architecture is sufficient to evaluate applications, workflows, and system software in near-production conditions. The selected applications are co-designed and deployed to test scalability, performance, and energy efficiency on ARM-based European hardware. Beyond technical validation, the pilot will provide a shared environment for European research teams and application owners, providing early access to new hardware technology and concrete feedback for future system design.
EUPEX Software Stack
EUPEX Pilot focuses on the software stack, which is a critical element for effectively leveraging ARM-based HPC systems. This project addresses the strategic requirement of the availability of a European software ecosystem that is independent of non-European technologies. For many scientific, industrial, and institutional users, HPC systems support highly sensitive and strategic activities, making software independence, security, and long-term control essential. EUPEX therefore aims to define and implement a software environment fully adapted to European technologies and practices.
The EUPEX software stack is designed to support both application execution and system operation in pilots. Its scope covers four major technical areas:
First, the management layer defines a software stack that supports the management of modular systems while remaining flexible enough to accommodate future evolving hardware architectures. This includes system configuration, monitoring, and operational control adapted to modular HPC environments.
The execution environment then integrates the necessary components to enable efficient use of all available resources across the EUPEX platform. Supports heterogeneous workloads and allows scientific applications to leverage multiple hardware modules in a consistent and efficient manner.
Third, a dedicated set of tools assists both application developers and system operators in optimizing system utilization in terms of performance and energy efficiency, including application tuning, performance analysis, and operational optimization.
Fourth, the storage architecture is defined as a multi-tiered system that meets the I/O demands of large platforms and transparently integrates high-speed storage technologies while minimizing data movement, which is critical for both performance and energy efficiency.
Additionally, all code and applications used in the project have been ported and adapted to the ARM architecture, allowing EUPEX to prepare key scientific and industrial applications for future architectures. This process will also provide European HPC specialists with practical experience and help them acquire the skills needed to operate and optimize future exascale-class European supercomputers.
EUPEX addresses the requirement that European HPC systems must maintain full-stack control by combining software and hardware development. The project will provide a software solution that meets security requirements, supports efficient execution, and addresses energy efficiency, complementing the Pilot hardware platform and preparing the basis for future large-scale European supercomputing systems.
Connect with the HPC community
EUPEX is focused on sharing knowledge with the European HPC community, alongside the development of pilot systems. The project is designed to be open and accessible, and the experience gained during system design, software integration, and application porting will benefit a wider range of users.
EUPEX researchers will regularly share their results through monthly webinars and highlight concrete outcomes from their projects. These sessions will focus on the applications analyzed and optimized within EUPEX and the key elements of the EUPEX software stack. Webinars are interactive and allow participants to interact directly with the project team. All recordings are published on the EUPEX YouTube channel, allowing long-term access to the material.
In addition to webinars, the project also organizes workshops and practical tutorials. These events are aimed at application developers, system operators, and researchers who want to better understand ARM-based architectures, HPC systems, and software tools developed within EUPEX. Through practical sessions, participants will be able to experiment with technologies, consider optimization strategies, and build relevant expertise for future European supercomputing platforms.
EUPEX also supports early engagement through the Early Access Program (EAP). Selected organizations, including EuroHPC Centers of Excellence, EU-funded research projects and other stakeholders, will be granted access to Grace-based partitions representing future SiPearl Rhea processors. This allows applications to be pre-ported, tested and optimized, while also providing access to software tools planned for deployment to EUPEX pilot systems.
Together, these activities complement the technical work of the project. EUPEX Pilot brings together hardware development, software integration, application co-design, and community engagement to demonstrate the feasibility of a fully European ARM-based supercomputing stack. This project provides a concrete step towards future large-scale European HPC systems, supporting technology sovereignty and commercialization of the next generation ARM architecture.
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This project has received funding from the European High Performance Computing Joint Undertaking (JU) under grant agreement number 101033975. JU receives support from the European Union’s Horizon 2020 research and innovation program and from France, Germany, Italy, Greece, the United Kingdom, Czech Republic and Croatia.
Please note: This is a commercial profile
This article will also be published in the quarterly magazine issue 25.
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